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Train A Deep Net for Free  --  How-to Video

Train deep nets powered by the world’s smallest (110 bytes on a Cortex-M4) inference engine. No credit card needed.

Train deep nets that can work on low-end MCU/DSP/FPGA while drawing power in the sub-µW range.

A download link to the trained net will be sent to you a day after you upload the data.

This portal lives on the Google Cloud and requires a Google account for sign-in. If you use Gmail, you already have a Google account.

After you have signed in, click on Continue.

Application Domain

The Infxl net is ideal for resource-constrained IoT edge devices. It is targeted at tabular and time-series data from temperature, pressure, vibration, acceleration, speed, tilt, flow, smell, and environmental sensors.

Low-Power, Low-Latency, Compact

The Infxl net runs well on low-end hardware, but it can provide 10x throughput of conventional nets on a higher-end MCU, DSP, or FPGA. It will be sent to you as optimized C code, free from floating-point ops and multiplications.

Sample nets:  MCU  FPGA  Multicore

Training Data Files

Data must be organized in the form of 4 CSV files (size limit 32 MB): training-features, training-labels, validation-features, and validation-labels. They must consist of integers only and not have headings or missing values.

Each label must have its own column, e.g. two columns for a two-class problem.

Binary columns must be mapped to the set {-127, 127}. Continuous-valued columns must be mapped to the range [-127, 127]. For example, if continuous values are in the range [0, 1], they are to be mapped using int(round(254 * value)) - 127

Sample pre-processed data:  Features  Labels

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